IPC-2221 Clearance: How Much Spacing Does Your Voltage Need?
By INDiPCB ·
Design rule defaults usually set one spacing value for the whole board. That is fine at logic voltages and quietly wrong the moment a mains section, a motor drive or a boost converter appears on the same PCB — because the spacing you need is a function of the voltage across the gap, not a single number you pick once.
IPC-2221 Table 6-1 is the reference most people mean when they talk about PCB clearance. Here it is in millimetres, with the parts that are easy to misread called out.
The table
| Voltage (peak) | B1 internal | B2 external, uncoated | B4 external, coated |
|---|---|---|---|
| 0 – 15 V | 0.05 mm | 0.10 mm | 0.05 mm |
| 16 – 30 V | 0.05 mm | 0.10 mm | 0.05 mm |
| 31 – 50 V | 0.10 mm | 0.60 mm | 0.13 mm |
| 51 – 100 V | 0.10 mm | 0.60 mm | 0.13 mm |
| 101 – 150 V | 0.20 mm | 0.60 mm | 0.40 mm |
| 151 – 170 V | 0.20 mm | 1.25 mm | 0.40 mm |
| 171 – 250 V | 0.20 mm | 1.25 mm | 0.40 mm |
| 251 – 300 V | 0.20 mm | 1.25 mm | 0.40 mm |
| 301 – 500 V | 0.25 mm | 2.50 mm | 0.80 mm |
| Above 500 V | add 0.0025 mm/V | add 0.005 mm/V | add 0.00305 mm/V |
Above 500 V the per-volt figure is added to the 500 V value. An uncoated external conductor at 1000 V therefore needs 2.5 + (500 × 0.005) = 5 mm.
Read the voltage correctly
The number you look up is the peak voltage difference between the two conductors either side of the gap — not the highest rail on the board.
Two traces sitting at 240 V and 235 V are 5 V apart and need almost nothing. A 240 V trace next to ground needs the full 240 V spacing. On a mains board the dangerous gaps are usually line-to-neutral and primary-to-secondary, and it is the isolation barrier that decides the board, not the average spacing everywhere else.
Also note peak, not RMS. 230 V RMS mains peaks at about 325 V, which moves you into the 301–500 V row — a jump from 1.25 mm to 2.5 mm uncoated. Using the RMS figure here is one of the most common and most consequential mistakes in the whole table.
Why coated and uncoated differ so much
At 300 V an uncoated external conductor needs 1.25 mm; with a permanent polymer coating the same gap drops to 0.4 mm. That is a factor of three, and it is why the column you use matters more than the row.
Bare copper in open air can arc across a gap, and airborne dust and humidity make it easier over time. A coating removes the air path and slows contamination. Soldermask is the usual coating, but it only counts where it is actually continuous — a mask opening, a via tented on one side only, or a scratch through the mask puts that gap back in the uncoated column.
Internal layers get the smallest numbers of all because they are fully encapsulated in laminate with no exposed surface to contaminate.
Clearance is not creepage
These two are used interchangeably in conversation and they are not the same thing.
- Clearance is the shortest distance through air between two conductors.
- Creepage is the shortest distance along the surface of the insulating material.
On a flat board with nothing in between they are the same number. They diverge as soon as there is a slot, a ridge or a barrier — which is exactly why isolation slots are milled between primary and secondary on mains boards. A slot does not change the straight-line clearance much, but it lengthens the surface path enormously.
IPC-2221 covers clearance. If you are designing to a product safety standard, that standard sets creepage separately and usually demands more than this table.
Trace width and clearance are separate decisions
These get conflated constantly, usually because a design rule dialog shows them side by side. They answer different questions, and neither constrains the other.
- Trace WIDTH is set by current — how much copper cross-section is needed to carry it without the trace heating more than you allow.
- Trace CLEARANCE is set by voltage — how much gap is needed so the two conductors do not arc or track across to each other.
A 10 A trace at 5 V needs to be very wide and can sit very close to its neighbour. A 10 mA trace at 400 V can be hair thin and needs millimetres of space around it. Widening a trace does nothing for its clearance; opening a gap does nothing for its current capacity.
The practical consequence is that a high-current, high-voltage net needs both — wide copper and a large gap — and those two demands compete for the same board area. That is usually what makes a power section awkward to lay out, rather than any single rule being tight.
The 3W rule — and why three
There is a third reason to leave a gap, and it has nothing to do with heating or arcing: crosstalk. A changing current in one trace couples into its neighbour through the magnetic field around it, and the closer the two run in parallel, the more of that field is shared.
The field is not confined to the copper — it spreads outward and weakens with distance. The 3W rule is a rule of thumb about how much of it you escape: at a centre-to-centre spacing of three times the trace width, roughly 70% of the field does not reach the neighbouring trace. Push out to 10W and you are at about 98%.
The part that catches people: 3W is centre to centre, not edge to edge. Each centre sits half a width in from its own edge, so a 3W centre-to-centre spacing leaves a gap of 2W. Applying 3W as the gap is not wrong, it is simply more conservative than the rule asks — and on a dense board that costs routing space for no extra benefit.
Three is not a physical constant. It is roughly where the curve of diminishing returns has flattened enough that most designs stop paying for more. Below it, coupling rises quickly; above it, you spend a lot of board area for the last few percent.
It also only matters where it matters. Apply it to clock lines, to differential pairs running alongside other signals, to reset and enable lines, and to anything switching fast next to something sensitive. Applying it to every trace on a two-layer board is a good way to run out of room solving a problem you did not have.
This table is not a safety standard
IPC-2221 is a design reference for bare board layout. It is not a substitute for the safety standard your product is certified against — IEC 62368-1, IEC 60335, an automotive or medical standard, or whatever applies to you.
Those standards consider pollution degree, material group, altitude, insulation class and whether the insulation is functional, basic or reinforced. They routinely require more than Table 6-1, and a board that satisfies IPC-2221 can still fail certification.
If your board touches mains, treat this table as the floor and the applicable standard as the requirement.
The fabrication limit is a different number
There are two separate constraints on the gap between two pieces of copper, and they are frequently confused:
- The electrical minimum — what the voltage needs, from the table above.
- The manufacturing minimum — the tightest gap the fabricator can reliably etch, whatever the voltage.
A board must satisfy both, and whichever is larger wins. A 5 V logic section may be electrically happy at 0.05 mm and still be refused because no ordinary process etches that. A 400 V section needs 2.5 mm uncoated regardless of how fine the fabricator can go.
Add crosstalk from the section above and there are really three reasons a gap has a minimum: what the fabricator can etch, what the voltage needs, and what the signal needs. They are independent, and the largest of the three governs.
Our own manufacturing minimum is published on the capabilities page, and every uploaded board is measured against it automatically. That check is about what we can etch — it does not know your voltages or your edge rates, so it cannot tell you whether a gap is electrically or electromagnetically adequate. That part is yours.
Practical approach
- Set your default design rule from the manufacturing minimum, so ordinary signal routing is unconstrained.
- Define separate net classes for anything above roughly 30 V and give each the spacing its own row demands.
- Treat the isolation barrier as its own rule, sized from the peak difference across it, and keep it clear of everything.
- Decide early whether you are claiming the coated column. If you are, the mask has to be continuous over those gaps by design, not by luck.
- Then check the result in a Gerber viewer, because a design rule you set and then locally overrode will not save you.